CTAccel Image Processor (CIP)
is a FPGA based high-performance image processing accelerator. By
taking advantage of deeply pipelined logic and multiple PE’s, CIP improves
server throughput and latency while reduces total cost of ownership.

CIP accelerates a typical JPEG decode, resize and webp encode workflow on a CPU based server by up to 5 times, while reducing latency by two-thirds at the same time. This is made possible by offloading all encode, decode and pixel level processing to the more efficient FPGA.

Each FPGA accelerators consumes only 20W of power. A single accelerator can raise server performance by 3 to 5 time. CIP can drastically increase compute density, which translates to less rack space and lower administration cost.

CIP is fully compatible with 2 of the most popular open source image processing software: ImageMagick and OpenCV. You get the flexibility of software and the performance of FPGA. No modification to your system
software is required.

The FPGA accelerator can be reconfigured remotely. CIP can be easily reconfigured to maximized performance for your custom usage scenario.

Usage Scenario 1

Real-world customer use case:

A cloud based photo storage customer generates 1080p images from full resolution images in real time. There are 500 million requests per day. Peak traffic reaches ten thousand images per second. 1500 CPU cores are used for this single application.

After adopting CIP:

The number of CPU cores used is cut by half. Total cost reduces by 25%. Load times reduces by 20% to 30%. Maintenance overhead drops. The team can now focus on improving image quality and other possibilities.


Usage Scenario 2

Real-world customer use case:

On a server with dual Xeon CPU and 128GB of memory. Generating thumbnail for ten thousand 8 Megapixel images took 100 seconds at full CPU utilization. Average latency to process each image is 240ms.

After adopting CIP:

Total computation time reduces by 80%. Latency reduces by 80%. CPU utilization drops by 55%.

CTAccel Ltd. is founded in March 2016. The core team of CTAccel comes from the FPGA team of Clustertech Ltd. The team has been involved in the development of FPGA based heterogeneous computing solution for Datacenter since 2013.
We have a 50-strong R&D team, with most its members holding an advance degree in science and engineering from top universities in the world and have extensive experience in algorithm design, FPGA design, hardware/ software codesign, system optimization and software engineering. Our team focus on accelerating image processing in Internet Data Center. Our patented CTAccel Image Processor (CIP) improves the performance and efficiency of image processing in datacenters.